000			00672nam a22002057a 4500
020			_a9789353062019
082			_a621.395 _bMAD
100			_aMano, M. Morris _921470
245			_aDigital design _b: with an introduction to the verilog HDL, VHDL, and system Verilog _cM. Morris Mano and Michael D. Ciletti
250			_a6th ed.
260			_aUttar Pradesh: _bPearson, _c2018.
300			_a765 p.
546			_aEng
650			_aElectronic digital computers-Circuits _9231135
650			_aLogic circuits _9231136
650			_aLogic design _9231137
650			_aDigital integrated circuits _9231138
700			_aCiletti, Michael (jt. auth) _9231139
942			_cBK
999			_c157047 _d157047