000 02839 a2200397 4500
020 _a0387465464
082 0 4 _a621
_bSAD
100 1 _aSachdev, Manoj
_973355
245 1 0 _aDefect-oriented testing for nano-metric cmos vlsi circuits
_cManoj Sachdev.
250 _a2nd ed.
260 _aDordrecht :
_bSpringer,
_c2007.
300 _axxi, 328p.
500 _aHB
520 _aFailures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and interconnect dimensions goes well beyond acceptable limits, new test methodologies and a deeper insight into the physics of defect-fault mappings are needed. In Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits state of the art of defect-oriented testing is presented from both a theoretical approach as well as from a practical point of view. Step-by-step handling of defect modeling, defect-oriented testing, yield modeling and its usage in common economics practices enables deeper understanding of concepts. The progression developed in this book is essential to understand new test methodologies, algorithms and industrial practices. Without the insight into the physics of nano-metric technologies, it would be hard to develop system-level test strategies that yield a high IC fault coverage. Obviously, the work on defect-oriented testing presented in the book is not final, and it is an evolving field with interesting challenges imposed by the ever-changing nature of nano-metric technologies. Test and design practitioners from academia and industry will find that Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits lays the foundations for further pioneering work.
546 _aEng
650 4 _aCircuits & components.
_92635
650 4 _aMathematics and Science.
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650 4 _aTechnology & Engineering.
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650 4 _aTechnology & Industrial Arts.
_996
650 4 _aScience/Mathematics.
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650 4 _aElectricity.
_973358
650 4 _aElectronics - Circuits - General.
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650 4 _aEngineering - Electrical & Electronic.
_9458
650 4 _aIndustrial Design - General.
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650 4 _aTechnology / Electronics / Circuits / General.
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650 4 _aTechnology / Electronics / Microelectronics.
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650 4 _aTechnology / Engineering / Electrical.
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650 4 _aTechnology / Industrial Design / General.
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650 4 _aDefects.
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650 4 _aIntegrated circuits.
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650 4 _aMetal oxide semiconductors, Complementary.
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650 4 _aTesting.
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650 4 _aVery large scale integration.
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700 1 _aGyvez, Jose pineda (jt. auth.)
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942 _cBK
999 _c32734
_d32734